Err94 Enh

94 Sequential Prefetch Feature May Cause Incorrect Processor Operation

Description

On an instruction cache miss, the sequential prefetch mechanism may enable the early prefetch of the next sequential cache line. Under a highly specific set of internal pipeline conditions this mechanism may cause the processor to hang or execute incorrect code in 64-bit systems running 32-bit compatibility mode applications.

Potential Effect on System

Processor may deadlock or execute incorrect code.

Suggested Workaround

BIOS should disable IC sequential prefetch by setting IC_CFG.DIS_SEQ_PREFETCH (bit 11 of
MSR C001_1021).

http://www.amd.com/us-en/assets/con..._docs/25759.pdf