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anomaly
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加入日期: Feb 2003
文章: 406
不是不能做, 只是很難

他們想達成的東西類似以下, 以前都是mainframe在做的事情.
https://en.wikipedia.org/wiki/Specu..._multithreading

IBM日本有做一些研究, 好玩的是用Haswell做
http://researcher.ibm.com/researche...14_TLSonHTM.pdf

用 Haswell是因為有支援硬體Transactional memory, 也加入了自己的程式搭配.
https://en.wikipedia.org/wiki/Transactional_memory

Haswell的Transactional Memory 是透過 TSX達成(但後來有BUG, 被microcode更新關閉, 目前好像只有Skylake的TSX是沒有bug的)
https://en.wikipedia.org/wiki/Trans...tion_Extensions

IBM日本研究人員的結論, SPEC CPU2006有11%進步, 但其他情況因記憶體衝突, 導致效能低落. 未來還需要一大堆功能輔助才能達成, 最後一句也有列出需要達到什麼.

引用:
We manually modified potentially parallel benchmarks in SPEC CPU2006 for thread-level speculation. Our experimental results showed that thread-level speculation resulted in up to an 11% speed-up even without the advanced optimization facilities, but actually degraded the performance in most cases.

In contrast to our expectations, the main reason for the performance loss was not the lack of hardware support for ordered transactions but the transaction aborts due to memory conflicts. Our investigation suggests that future hardware should support not only ordered transactions but also memory data forwarding, data synchronization, multi-version cache, and word-level conflict detection for thread-level speculation.
舊 2015-10-05, 11:10 PM #13
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