挺神奇的...C-State C3/C6在Intel的Datasheet中明明是寫是CPU功能：
Intel P67 Datasheet：
http://www.intel.com/Assets/PDF/datasheet/324645.pdf

節錄自第169頁：
Cx State: Cx states are processor power states within the S0 system state that provide for various levels of power savings. The processor initiates C-state entry and exit while interacting with the PCH. The PCH will base its behavior on the processor state.

節錄自第174頁：
5.13.5 C-States
PCH-based systems implement C-states by having the processor control the states. The chipset exchanges messages with the processor as part of the C-state flow, but the chipset does not directly control any of the processor impacts of C-states, such as voltage levels or processor clocking. In addition to the new messages, the PCH also provides additional information to the processor using a sideband pin (PMSYNCH). All of the legacy C-state related pins (STPCLK#, STP_CPU#, DPRSLP#, DPRSLPVR#, etc.) do not exist on the PCH.

Intel官方文件「Energy Efficient Platforms」：
http://www.intel.com/technology/mob...w=%28C-STATE%29

第10頁有明確說明每個C-State會做什麼。

以上都是Intel官方文件，不太能理解主機板要怎麼自己去生出這種功能...。