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Major Member
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最先出現於E8500, E8400
http://article.gmane.org/gmane.comp...xen.devel/51790
引用:
From: Cui, Dexuan <dexuan.cui <at> intel.com>
Subject: RE: [PATCH] Add xsave/xrstor support to Xen
Newsgroups: gmane.comp.emulators.xen.devel
Date: 2008-05-28 13:11:02 GMT (39 weeks, 4 days, 14 hours and 52 minutes ago)
The xsave/xrstor infrastructure is mainly for extensibility with respect to the "processor extened
states" since more extended states are coming (i.e. http://softwarecommunity.intel.com/...ce-31943302.pdf).
With the patch, XSAVE-aware HVM guest can make use of the coming extended features.
And Intel SDM 3A: chatper 12 ( SYSTEM PROGRAMMING FOR INSTRUCTION SET EXTENSIONS AND PROCESSOR EXTENDED
STATES) supplies a generic description.
BTW, some CPU, such as Intel Core 2 Duo Processor E8500, E8400, have had the support of the XSAVE/XRSTOR instructions.
For now, the xsave_area is at least 512 + 64 (the xsave header) = 576 bytes in length, though the first 512
bytes are completely compatible with the legacy 512-byte arch.guest_context.fpu_ctxt; actually we
also have to save the per-vcpu 64-bit "xfeature_mask", and the gloabal variables
"xsave_cntxt_max_size, xfeature_low, xfeature_high" (imagine different CPU has different XSAVE
capability). So I think we have to extend the current save/restore format.
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