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kuang 2001-11-09 06:42 AM

新發現!!
 
更新8K7A的BIOS(1a17)後
PnP/PCI Configurations中多了一個
PCI Latency Timer(CLK)選項
可指定PCI的頻率,不再以除頻方式跑
即不論外頻多高,PCI都可以定在33(或指定的頻率)
以後可安心超外頻了,不怕周邊掛掉

yhch 2001-11-09 08:36 AM

不是喔
請看:
http://www.rojakpot.com/Speed_Demon...S_Guide_02h.htm

======= 這是引自上面的網頁 ============
PCI Latency Timer
Options : 0 - 255

This feature controls how long each PCI device can hold the bus before another takes over. The larger the value, the longer the PCI device can retain control of the bus. As each access to the bus comes with an initial delay before any transaction can be made, low values for the PCI Latency Timer will reduce the effective PCI bandwidth while higher values improve it.

On the other hand, while increasing the value lets each PCI device access the bus longer, the response time of those PCI devices suffers as a result. That means every PCI device will have to wait longer before they can get access to the bus but when they do get access, they can conduct their transactions for a longer time.

Normally, the PCI Latency Timer is set to 32 cycles. For better PCI performance, a larger value should be used. Try increasing it to 64 cycles or even 128 cycles. Some PCI devices may not agree with longer latency times so if you start facing problems like stuttering sound or a less responsive system, reduce the latency. Higher values will actually reduce performance as too much time may be allocated to each PCI device to the disadvantage of other devices on the bus.

kuang 2001-11-09 05:55 PM

原來如此!感謝這位大大糾正。
我白高興一場!
嗚 ∼∼嗚∼∼


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